Available at: https://digitalcommons.calpoly.edu/theses/33
Date of Award
MS in Electrical Engineering
The future of microprocessors is unknown. Over the past 40 years, their historical trend has been for adopting smaller and more powerful designs that drive the world that we live in today. The state of the microprocessor business today faces a crossroad, wishing to continue on the historical trend of doubling the number of transistors on a chip every 18 months (Moore’s Law) but also facing the realistic task of needing to power these sophisticated devices. With the low voltages and high currents that are required for these microprocessors to operate, it poses a difficult task for the future designers of the voltage regulators that are used to power these microprocessors. The technique that has been widely adopted as the preferred method to power these devices is called a multiphase buck converter, or multiphase voltage regulator.
This thesis is a continuation of and is aimed to improve previous work done by two former Cal Poly students, Kay Ohn and Ian Waters. A new design that uses an interleaving control scheme, careful component selection, an input LC filter, and a reduction in board size seeks to improve the efficiency, input current noise, and increase the current density of the original design. Research was first conducted to determine how to best make such improvements. The design phase ensued, which used design calculations and simulations to test if the proposed multiphase topology was plausible. Once the theory was fully proven, a real hardware circuit was created and tested to confirm the results. The results yield a multiphase design with improved input noise filtering, greater efficiency, more equal current sharing, and higher current density as compared to previous topologies in this field. Parameters such as output voltage ripple, load and line regulation, and transient response remained excellent, as they were with the previous work.