College - Author 1
College of Engineering
Department - Author 1
Electrical Engineering Department
Degree Name - Author 1
BS in Electrical Engineering
Date
6-2022
Primary Advisor
William Ahlgren, College of Engineering , Electrical Engineering Department
Abstract/Summary
Audio signals are representations of sounds with a mixture of multiple analog signals between the frequency of 20Hz to 20,000Hz. To record snippets of audio data onto a mobile phone or computer, the signal needs to be converted to a digital format. For this purpose, many devices utilize a converter, specifically a sigma-delta modulator with a digital filter. By using a converter, electronics can receive binary data about the audio signal accurately and quickly without losing important signal information. This project aims to simulate a fully functional audio converter with a sigma-delta modulator and decimation filter. The system will receive any analog signal between 20Hz and 22.05kHz while being oversampled at 2.8224MHz with a 64 oversampling ratio value, meaning the sampling frequency is 44.1kHz. As a result, the system will be outputting a corresponding digital 6-bit binary value at the rate of 44.1kHz. This whole system will be running on a +/- 5V power supply. While this project concentrates on the simulation of the device using some real components and Verilog-A, the programmed components can be replaced with real electronic components to create a fully operational VLSI converter design.
URL: https://digitalcommons.calpoly.edu/eesp/559