Title
College - Author 1
College of Engineering
Department - Author 1
Computer Engineering Department
Degree Name - Author 1
BS in Computer Engineering
Date
6-2020
Primary Advisor
Joseph Callenes-Sloan, College of Engineering, Computer Engineering Department
Abstract/Summary
This paper offers an implementation of a subset of the "RISC-V 'V' Vector Extension", v0.7.x. The "RISC-V 'V' Vector Extension" is the proposed vector instruction set for RISC-V open-source architecture. Vectors are inherently data-parallel, allowing for significant performance increases. Vectors have applications in fields such as cryptography, graphics, and machine learning. A vector processing unit was added to Cal Poly's RISC-V multi-cycle architecture, known as the OTTER. Computationally intensive programs running on the OTTER Vector Extension ran over three times faster when compared to the baseline multi-cycle implementation. Memory intensive applications saw similar performance increases.
URL: https://digitalcommons.calpoly.edu/cpesp/327
Instruction
Included in
Computer and Systems Architecture Commons, Digital Circuits Commons, Hardware Systems Commons