Available at: https://digitalcommons.calpoly.edu/theses/3010
Date of Award
6-2025
Degree Name
MS in Electrical Engineering
Department/Program
Electrical Engineering
College
College of Engineering
Advisor
Jason Poon
Advisor Department
Electrical Engineering
Advisor College
College of Engineering
Abstract
This thesis presents the design, implementation, and analysis of a hardware system for solving Linearly Constrained Quadratic Programs (LCQPs) in real time. The architecture follows a generalized feedback structure composed of three key elements: gradient descent on the quadratic cost function, saturation-based nonlinearity to enforce inequality constraints, and an integral controller with an anti-windup mechanism to regulate dynamic behavior and determine steady-state error. This majority analog system converges with equilibria that satisfy the Karush-Kuhn-Tucker (KKT) optimality conditions. Using a representative LCQP, this work presents simulation of the circuit in PLECS and LT Spice to confirm the feasibility of the novel architecture presented. In addition, a hardware implementation was designed on a printed circuit board (PCB) and tested in terms of accuracy and convergence speed, achieving equilibrium values within 0.5% error of the theoretical solutions and at speeds that rivals other hardware prototypes of its kind. These promising results lay the groundwork for the next phase of development: a VLSI-based implementation aimed at achieving even higher levels of integration and computational efficiency. Ultimately, this work contributes to the growing body of research on analog computing architectures that synthesize control, optimization, and computation in physical hardware.
Included in
Controls and Control Theory Commons, VLSI and Circuits, Embedded and Hardware Systems Commons