A rail-to-rail constant-gm input stage suitable for bipolar or weak inversion CMOS implementation is presented. To achwe rail-to rail operation, two complementary differential pairs driven in parallel are used. To guarantee constant net transconductance each differential pair is augmented with a suitable biasing circuit. The biasing circuits are implemented without current mirrors, which results in low sensitivity to process variations and potentially higher bandwidth.


Electrical and Computer Engineering

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This paper is a postprint of a paper submitted to and accepted for publication in Electronics Letters and is subject to Institution of Engineering and Technology Copyright.



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