Computer Engineering Department
BS in Computer Engineering
The third generation NetPRL CiNIC co-processor cards were fabricated and partially assembled during Summer 2005. Unfortunately the prototype network processing hardware was incomplete, untested, and could not yet be used by NetPRL project teams as a firmware and software development platform. This project endeavored to prepare the latest CiNIC for use in advancing iNIC related research at Cal Poly. The project began with the assembly and modifications necessary to complete the co-processor card. During assembly several manufacturability design issues were corrected or workarounds developed. Preliminary hardware verification testing was also conducted from continuity checks, power and smoke test, and hardware programming demonstration. The latest CiNIC prototype design is partially functional but many features are not yet proven and require additional testing.