Date

6-2009

Degree Name

BS in Electrical Engineering

Department

Electrical Engineering Department

Advisor

John Oliver

Abstract

I conducted this study of on-line stability detectors to learn more about stability checking in VLSI circuitry and how I varied the conditions in order to try to find trends on how well the stability detectors work each set of conditions. I varied the clock speed, temperature, transistor feature size, and sizing of the transistors in both Franco’s Stability Checker and Yada’s MSC Cell from papers [3] and [5] respectively. I found that the sizing has the greatest impact on both test stability detectors and that both stability detectors can work under a variety of conditions with little to no loss in functionality. I did notice, however, that in general lower temperatures and smaller feature sizes produce better performance under most conditions. For Franco’s detector, a smaller error pullup transistor results in better error detection while a larger pullup transistor allows for better setup times. For the MSC Cell, smaller transistors resulted in better performance.

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