Title

Intermediate Representations for Controllers in Chip Generators

Author Info

Kyle Kelley, Stanford University
Megan Wachs, Stanford University
Andrew Danowitz, Stanford UniversityFollow
Pete Stevenson, Stanford University
Stephen Richardon, Stanford University
Mark Horowitz, Stanford University

Recommended Citation

Postprint version. Published in Design, Automation & Test in Europe Conference & Exhibition Proceedings: Grenoble, France, March 14, 2011.

At the time of publication, author Andrew Danowitz was not yet affiliated with Cal Poly

The definitive version is available at https://doi.org/10.1109/DATE.2011.5763225.

Abstract

Creating parameterized “chip generators” has been proposed as one way to decrease chip NRE costs. While many approaches are available for creating or generating flexible data path elements, the design of flexible controllers is more problematic. The most common approach is to create a microcoded engine as the controller, which offers flexibility through programmable table-based lookup functions. This paper shows that after “programming” the hardware for the desired application, or applications, these flexible controller designs can be easily converted to efficient fixed (or less programmable) solutions using partial evaluation capabilities that are already present in most synthesis tools.

Disciplines

Computer Sciences

Copyright

2011 IEEE

Number of Pages

6

Publisher statement

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