Date

12-2010

Degree Name

BS in Computer Engineering

Department

Computer Engineering Department

Advisor(s)

Chris Lupo

Abstract

One of the most important considerations in embedded systems is code size. This consideration is obviously imposed by external factors such as cost and physical space, but what it boils down to is that we want our devices to be as powerful as they can within a (typically limited) specific form factor. This limits the amount of space we have for memory and as such we should always be considering the code size of our application and making sure it’s as efficient as possible. We also then need to consider other factors such as performance and power consumption. This is where the ARM architecture comes into place. This architecture supports a dual-width instruction set meaning that it can switch between 16- and 32-bit instructions on the fly with a few different instructions. This allows us to reduce our code size with an expected hit to performance. Now that these processors are increasing in popularity, there is a lot of support for them including GCC (GNU C Compiler) support. GCC has two flags that allow us to tell the compiler to use these Thumb mode optimizations where possible. The purpose of this project is to measure what code size reduction we see against how much increase in processing time there is for a few different processor intensive applications.

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